mirror of
https://github.com/TorqueGameEngines/Torque3D.git
synced 2026-07-13 15:44:36 +00:00
commit
f88975121d
7 changed files with 9 additions and 10 deletions
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@ -285,8 +285,7 @@ U32 OggTheoraDecoder::read( OggTheoraFrame** buffer, U32 num )
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// Transcode the packet.
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// Transcode the packet.
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#if ( defined( TORQUE_COMPILER_GCC ) || defined( TORQUE_COMPILER_VISUALC ) ) && defined( TORQUE_CPU_X86 )
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#if ( defined( TORQUE_COMPILER_GCC ) || defined( TORQUE_COMPILER_VISUALC ) ) && (defined( TORQUE_CPU_X86 ) || defined( TORQUE_CPU_X64 ))
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if( ( mTranscoder == TRANSCODER_Auto || mTranscoder == TRANSCODER_SSE2420RGBA ) &&
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if( ( mTranscoder == TRANSCODER_Auto || mTranscoder == TRANSCODER_SSE2420RGBA ) &&
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getDecoderPixelFormat() == PIXEL_FORMAT_420 &&
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getDecoderPixelFormat() == PIXEL_FORMAT_420 &&
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Platform::SystemInfo.processor.properties & CPU_PROP_SSE2 &&
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Platform::SystemInfo.processor.properties & CPU_PROP_SSE2 &&
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@ -420,7 +419,7 @@ void OggTheoraDecoder::_transcode( th_ycbcr_buffer ycbcr, U8* buffer, const U32
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}
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}
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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#if defined( TORQUE_CPU_X86 )
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#if (defined( TORQUE_CPU_X86 ) || defined( TORQUE_CPU_X64 ))
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void OggTheoraDecoder::_transcode420toRGBA_SSE2( th_ycbcr_buffer ycbcr, U8* buffer, U32 width, U32 height, U32 pitch )
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void OggTheoraDecoder::_transcode420toRGBA_SSE2( th_ycbcr_buffer ycbcr, U8* buffer, U32 width, U32 height, U32 pitch )
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{
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{
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AssertFatal( width % 2 == 0, "OggTheoraDecoder::_transcode420toRGBA_SSE2() - width must be multiple of 2" );
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AssertFatal( width % 2 == 0, "OggTheoraDecoder::_transcode420toRGBA_SSE2() - width must be multiple of 2" );
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@ -560,7 +559,7 @@ void OggTheoraDecoder::_transcode420toRGBA_SSE2( th_ycbcr_buffer ycbcr, U8* buff
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jnz hloop
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jnz hloop
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};
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};
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#elif defined( TORQUE_COMPILER_GCC ) && defined( TORQUE_CPU_X86 )
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#elif defined( TORQUE_COMPILER_GCC ) && (defined( TORQUE_CPU_X86 ) || defined( TORQUE_CPU_X64 ))
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asm( "pushal\n" // Save all general-purpose registers.
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asm( "pushal\n" // Save all general-purpose registers.
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@ -172,7 +172,7 @@ class OggTheoraDecoder : public OggDecoder,
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/// Generic transcoder going from any of the Y'CbCr pixel formats to
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/// Generic transcoder going from any of the Y'CbCr pixel formats to
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/// any RGB format (that is supported by GFXFormatUtils).
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/// any RGB format (that is supported by GFXFormatUtils).
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void _transcode( th_ycbcr_buffer ycbcr, U8* buffer, U32 width, U32 height );
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void _transcode( th_ycbcr_buffer ycbcr, U8* buffer, U32 width, U32 height );
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#if defined( TORQUE_CPU_X86 )
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#if (defined( TORQUE_CPU_X86 ) || defined( TORQUE_CPU_X64 ))
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/// Transcoder with fixed 4:2:0 to RGBA conversion using SSE2 assembly. Unused on 64 bit archetecture.
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/// Transcoder with fixed 4:2:0 to RGBA conversion using SSE2 assembly. Unused on 64 bit archetecture.
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void _transcode420toRGBA_SSE2( th_ycbcr_buffer ycbcr, U8* buffer, U32 width, U32 height, U32 pitch );
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void _transcode420toRGBA_SSE2( th_ycbcr_buffer ycbcr, U8* buffer, U32 width, U32 height, U32 pitch );
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#endif
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#endif
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@ -203,7 +203,7 @@ extern "C"
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void SSE_MatrixF_x_MatrixF_Aligned(const F32 *matA, const F32 *matB, F32 *result);
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void SSE_MatrixF_x_MatrixF_Aligned(const F32 *matA, const F32 *matB, F32 *result);
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}
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}
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#elif defined( TORQUE_COMPILER_GCC ) && defined( TORQUE_CPU_X86 )
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#elif defined( TORQUE_COMPILER_GCC ) && (defined( TORQUE_CPU_X86 ) || defined( TORQUE_CPU_X64 ))
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#define ADD_SSE_FN
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#define ADD_SSE_FN
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void SSE_MatrixF_x_MatrixF(const F32 *matA, const F32 *matB, F32 *result)
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void SSE_MatrixF_x_MatrixF(const F32 *matA, const F32 *matB, F32 *result)
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@ -23,7 +23,7 @@
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#ifndef _TSMESHINTRINSICS_ARCH_H_
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#ifndef _TSMESHINTRINSICS_ARCH_H_
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#define _TSMESHINTRINSICS_ARCH_H_
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#define _TSMESHINTRINSICS_ARCH_H_
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#if defined(TORQUE_CPU_X86)
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#if (defined( TORQUE_CPU_X86 ) || defined( TORQUE_CPU_X64 ))
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# // x86 CPU family implementations
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# // x86 CPU family implementations
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extern void zero_vert_normal_bulk_SSE(const dsize_t count, U8 * __restrict const outPtr, const dsize_t outStride);
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extern void zero_vert_normal_bulk_SSE(const dsize_t count, U8 * __restrict const outPtr, const dsize_t outStride);
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#
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#
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@ -21,7 +21,7 @@
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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#include "ts/tsMesh.h"
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#include "ts/tsMesh.h"
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#if defined(TORQUE_CPU_X86)
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#if (defined( TORQUE_CPU_X86 ) || defined( TORQUE_CPU_X64 ))
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#include "ts/tsMeshIntrinsics.h"
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#include "ts/tsMeshIntrinsics.h"
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#include <xmmintrin.h>
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#include <xmmintrin.h>
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@ -21,7 +21,7 @@
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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#include "ts/tsMesh.h"
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#include "ts/tsMesh.h"
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#if defined(TORQUE_CPU_X86) && (_MSC_VER >= 1500)
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#if (defined(TORQUE_CPU_X86) || defined( TORQUE_CPU_X64 )) && (_MSC_VER >= 1500)
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#include "ts/tsMeshIntrinsics.h"
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#include "ts/tsMeshIntrinsics.h"
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#include <smmintrin.h>
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#include <smmintrin.h>
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@ -65,7 +65,7 @@ MODULE_BEGIN( TSMeshIntrinsics )
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// Find the best implementation for the current CPU
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// Find the best implementation for the current CPU
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if(Platform::SystemInfo.processor.properties & CPU_PROP_SSE)
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if(Platform::SystemInfo.processor.properties & CPU_PROP_SSE)
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{
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{
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#if defined(TORQUE_CPU_X86)
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#if (defined( TORQUE_CPU_X86 ) || defined( TORQUE_CPU_X64 ))
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zero_vert_normal_bulk = zero_vert_normal_bulk_SSE;
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zero_vert_normal_bulk = zero_vert_normal_bulk_SSE;
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#endif
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#endif
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