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Add support for aarch64 / apple silicon

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This commit is contained in:
Jeff Hutchinson 2021-05-08 22:18:45 -04:00
parent ce79101cb3
commit e981fd2cc3
8 changed files with 20 additions and 5 deletions
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2
Engine/lib/convexDecomp/NvThreadConfig.cpp
View file

@ -135,6 +135,8 @@ void tc_spinloop()
// Pause would do nothing on the Xbox. Threads are not scheduled. // Pause would do nothing on the Xbox. Threads are not scheduled.
#elif defined( _WIN64 ) #elif defined( _WIN64 )
YieldProcessor( ); YieldProcessor( );
#elif (defined( __arm64__ ) && defined( __APPLE__ )) || defined( __arch64__ )
asm( "yield" );
#else #else
__asm { pause }; __asm { pause };
#endif #endif

2
Engine/source/console/codeBlock.cpp
View file

@ -447,7 +447,7 @@ bool CodeBlock::read(StringTableEntry fileName, Stream &st)
{ {
U32 ip; U32 ip;
st.read(&ip); st.read(&ip);
#ifdef TORQUE_CPU_X64 #if defined(TORQUE_CPU_X64) || defined(TORQUE_CPU_ARM64)
*(U64*)(code + ip) = (U64)ste; *(U64*)(code + ip) = (U64)ste;
#else #else
code[ip] = *((U32 *)&ste); code[ip] = *((U32 *)&ste);

2
Engine/source/console/compiler.cpp
View file

@ -65,7 +65,7 @@ namespace Compiler
void evalSTEtoCode(StringTableEntry ste, U32 ip, U32 *ptr) void evalSTEtoCode(StringTableEntry ste, U32 ip, U32 *ptr)
{ {
#ifdef TORQUE_CPU_X64 #if defined(TORQUE_CPU_X64) || defined(TORQUE_CPU_ARM64)
*(U64*)(ptr) = (U64)ste; *(U64*)(ptr) = (U64)ste;
#else #else
*ptr = (U32)ste; *ptr = (U32)ste;

2
Engine/source/console/compiler.h
View file

@ -254,7 +254,7 @@ namespace Compiler
inline StringTableEntry CodeToSTE(U32 *code, U32 ip) inline StringTableEntry CodeToSTE(U32 *code, U32 ip)
{ {
#ifdef TORQUE_CPU_X64 #if defined(TORQUE_CPU_X64) || defined(TORQUE_CPU_ARM64)
return (StringTableEntry)(*((U64*)(code + ip))); return (StringTableEntry)(*((U64*)(code + ip)));
#else #else
return (StringTableEntry)(*(code + ip)); return (StringTableEntry)(*(code + ip));

2
Engine/source/core/util/uuid.cpp
View file

@ -70,7 +70,7 @@
#include "core/util/md5.h" #include "core/util/md5.h"
#include "console/enginePrimitives.h" #include "console/enginePrimitives.h"
#if defined (TORQUE_OS_MAC) && defined(TORQUE_CPU_X64) #if defined (TORQUE_OS_MAC) && (defined(TORQUE_CPU_X64) || defined(TORQUE_CPU_ARM64))
typedef unsigned int unsigned32; typedef unsigned int unsigned32;
#else #else
typedef unsigned long unsigned32; typedef unsigned long unsigned32;

5
Engine/source/platform/types.gcc.h
View file

@ -120,6 +120,11 @@ typedef unsigned long U64;
# define TORQUE_CPU_X64 # define TORQUE_CPU_X64
# define TORQUE_LITTLE_ENDIAN # define TORQUE_LITTLE_ENDIAN
#elif (defined( __arm64__ ) && defined( __APPLE__ )) || defined( __arch64__ )
# define TORQUE_CPU_STRING "Arm 64"
# define TORQUE_CPU_ARM64
# define TORQUE_LITTLE_ENDIAN
#else #else
# error "GCC: Unsupported Target CPU" # error "GCC: Unsupported Target CPU"
#endif #endif

2
Engine/source/platform/types.h
View file

@ -128,7 +128,7 @@ static const F32 F32_MAX = F32(3.402823466e+38F); ///< Constant
#endif #endif
/// Integral type matching the host's memory address width. /// Integral type matching the host's memory address width.
#ifdef TORQUE_CPU_X64 #if defined(TORQUE_CPU_X64) || defined(TORQUE_CPU_ARM64)
typedef U64 MEM_ADDRESS; typedef U64 MEM_ADDRESS;
#else #else
typedef U32 MEM_ADDRESS; typedef U32 MEM_ADDRESS;

8
Engine/source/platformMac/macMath.mm
View file

@ -34,21 +34,29 @@ static MRandomLCG sgPlatRandom;
U32 Platform::getMathControlState() U32 Platform::getMathControlState()
{ {
#ifdef TORQUE_CPU_X86
U16 cw; U16 cw;
asm("fstcw %0" : "=m" (cw) :); asm("fstcw %0" : "=m" (cw) :);
return cw; return cw;
#else
return 0;
#endif
} }
void Platform::setMathControlState(U32 state) void Platform::setMathControlState(U32 state)
{ {
#ifdef TORQUE_CPU_X86
U16 cw = state; U16 cw = state;
asm("fldcw %0" : : "m" (cw)); asm("fldcw %0" : : "m" (cw));
#endif
} }
void Platform::setMathControlStateKnown() void Platform::setMathControlStateKnown()
{ {
#ifdef TORQUE_CPU_X86
U16 cw = 0x27F; U16 cw = 0x27F;
asm("fldcw %0" : : "m" (cw)); asm("fldcw %0" : : "m" (cw));
#endif
} }
//-------------------------------------- //--------------------------------------