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https://github.com/TorqueGameEngines/Torque3D.git
synced 2026-07-12 07:04:36 +00:00
update openal-soft to 1.24.3
keeping the alt 87514151c4 (diff-73a8dc1ce58605f6c5ea53548454c3bae516ec5132a29c9d7ff7edf9730c75be)
This commit is contained in:
AzaezelX
parent
12db0500e8
commit
ba32094b7b
276 changed files with 49304 additions and 8712 deletions
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@ -73,6 +73,8 @@
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#include "alnumbers.h"
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#include "alnumeric.h"
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#include "alspan.h"
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#include "fmt/core.h"
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#include "fmt/ranges.h"
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#include "opthelpers.h"
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@ -98,7 +100,8 @@ namespace {
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/*
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* Altivec support macros
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*/
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#if defined(__ppc__) || defined(__ppc64__) || defined(__powerpc__) || defined(__powerpc64__)
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#if (defined(__ppc__) || defined(__ppc64__) || defined(__powerpc__) || defined(__powerpc64__)) \
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&& (defined(__VEC__) || defined(__ALTIVEC__))
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#include <altivec.h>
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using v4sf = vector float;
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constexpr uint SimdSize{4};
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@ -127,7 +130,6 @@ force_inline void uninterleave2(v4sf in1, v4sf in2, v4sf &out1, v4sf &out2) noex
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{
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out1 = vec_perm(in1, in2, (vector unsigned char){0,1,2,3,8,9,10,11,16,17,18,19,24,25,26,27});
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out2 = vec_perm(in1, in2, (vector unsigned char){4,5,6,7,12,13,14,15,20,21,22,23,28,29,30,31});
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out1 = tmp;
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}
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force_inline void vtranspose4(v4sf &x0, v4sf &x1, v4sf &x2, v4sf &x3) noexcept
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@ -324,7 +326,7 @@ force_inline constexpr v4sf ld_ps1(float a) noexcept { return a; }
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#else
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[[maybe_unused]] inline
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[[maybe_unused, nodiscard]] inline
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auto valigned(const float *ptr) noexcept -> bool
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{
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static constexpr uintptr_t alignmask{SimdSize*sizeof(float) - 1};
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@ -358,61 +360,59 @@ constexpr auto make_float_array(std::integer_sequence<T,N...>)
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{ return std::array{static_cast<float>(N)...}; }
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/* detect bugs with the vector support macros */
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[[maybe_unused]] void validate_pffft_simd()
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[[maybe_unused]] auto validate_pffft_simd() -> bool
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{
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using float4 = std::array<float,4>;
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static constexpr auto f = make_float_array(std::make_index_sequence<16>{});
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v4sf a0_v{vset4(f[ 0], f[ 1], f[ 2], f[ 3])};
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v4sf a1_v{vset4(f[ 4], f[ 5], f[ 6], f[ 7])};
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v4sf a2_v{vset4(f[ 8], f[ 9], f[10], f[11])};
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v4sf a3_v{vset4(f[12], f[13], f[14], f[15])};
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v4sf u_v{};
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auto a0_v = vset4(f[ 0], f[ 1], f[ 2], f[ 3]);
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auto a1_v = vset4(f[ 4], f[ 5], f[ 6], f[ 7]);
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auto a2_v = vset4(f[ 8], f[ 9], f[10], f[11]);
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auto a3_v = vset4(f[12], f[13], f[14], f[15]);
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auto t_v = vzero();
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auto t_f = al::bit_cast<float4>(t_v);
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printf("VZERO=[%2g %2g %2g %2g]\n", t_f[0], t_f[1], t_f[2], t_f[3]);
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fmt::println("VZERO={}", t_f);
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assertv4(t_f, 0, 0, 0, 0);
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t_v = vadd(a1_v, a2_v);
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t_f = al::bit_cast<float4>(t_v);
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printf("VADD(4:7,8:11)=[%2g %2g %2g %2g]\n", t_f[0], t_f[1], t_f[2], t_f[3]);
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fmt::println("VADD(4:7,8:11)={}", t_f);
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assertv4(t_f, 12, 14, 16, 18);
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t_v = vmul(a1_v, a2_v);
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t_f = al::bit_cast<float4>(t_v);
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printf("VMUL(4:7,8:11)=[%2g %2g %2g %2g]\n", t_f[0], t_f[1], t_f[2], t_f[3]);
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fmt::println("VMUL(4:7,8:11)={}", t_f);
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assertv4(t_f, 32, 45, 60, 77);
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t_v = vmadd(a1_v, a2_v, a0_v);
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t_f = al::bit_cast<float4>(t_v);
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printf("VMADD(4:7,8:11,0:3)=[%2g %2g %2g %2g]\n", t_f[0], t_f[1], t_f[2], t_f[3]);
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fmt::println("VMADD(4:7,8:11,0:3)={}", t_f);
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assertv4(t_f, 32, 46, 62, 80);
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auto u_v = v4sf{};
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interleave2(a1_v, a2_v, t_v, u_v);
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t_f = al::bit_cast<float4>(t_v);
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auto u_f = al::bit_cast<float4>(u_v);
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printf("INTERLEAVE2(4:7,8:11)=[%2g %2g %2g %2g] [%2g %2g %2g %2g]\n",
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t_f[0], t_f[1], t_f[2], t_f[3], u_f[0], u_f[1], u_f[2], u_f[3]);
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fmt::println("INTERLEAVE2(4:7,8:11)={} {}", t_f, u_f);
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assertv4(t_f, 4, 8, 5, 9);
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assertv4(u_f, 6, 10, 7, 11);
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uninterleave2(a1_v, a2_v, t_v, u_v);
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t_f = al::bit_cast<float4>(t_v);
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u_f = al::bit_cast<float4>(u_v);
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printf("UNINTERLEAVE2(4:7,8:11)=[%2g %2g %2g %2g] [%2g %2g %2g %2g]\n",
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t_f[0], t_f[1], t_f[2], t_f[3], u_f[0], u_f[1], u_f[2], u_f[3]);
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fmt::println("UNINTERLEAVE2(4:7,8:11)={} {}", t_f, u_f);
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assertv4(t_f, 4, 6, 8, 10);
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assertv4(u_f, 5, 7, 9, 11);
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t_v = ld_ps1(f[15]);
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t_f = al::bit_cast<float4>(t_v);
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printf("LD_PS1(15)=[%2g %2g %2g %2g]\n", t_f[0], t_f[1], t_f[2], t_f[3]);
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fmt::println("LD_PS1(15)={}", t_f);
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assertv4(t_f, 15, 15, 15, 15);
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t_v = vswaphl(a1_v, a2_v);
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t_f = al::bit_cast<float4>(t_v);
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printf("VSWAPHL(4:7,8:11)=[%2g %2g %2g %2g]\n", t_f[0], t_f[1], t_f[2], t_f[3]);
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fmt::println("VSWAPHL(4:7,8:11)={}", t_f);
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assertv4(t_f, 8, 9, 6, 7);
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vtranspose4(a0_v, a1_v, a2_v, a3_v);
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@ -420,13 +420,13 @@ constexpr auto make_float_array(std::integer_sequence<T,N...>)
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auto a1_f = al::bit_cast<float4>(a1_v);
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auto a2_f = al::bit_cast<float4>(a2_v);
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auto a3_f = al::bit_cast<float4>(a3_v);
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printf("VTRANSPOSE4(0:3,4:7,8:11,12:15)=[%2g %2g %2g %2g] [%2g %2g %2g %2g] [%2g %2g %2g %2g] [%2g %2g %2g %2g]\n",
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a0_f[0], a0_f[1], a0_f[2], a0_f[3], a1_f[0], a1_f[1], a1_f[2], a1_f[3],
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a2_f[0], a2_f[1], a2_f[2], a2_f[3], a3_f[0], a3_f[1], a3_f[2], a3_f[3]);
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fmt::println("VTRANSPOSE4(0:3,4:7,8:11,12:15)={} {} {} {}", a0_f, a1_f, a2_f, a3_f);
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assertv4(a0_f, 0, 4, 8, 12);
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assertv4(a1_f, 1, 5, 9, 13);
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assertv4(a2_f, 2, 6, 10, 14);
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assertv4(a3_f, 3, 7, 11, 15);
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return true;
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}
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#endif //!PFFFT_SIMD_DISABLE
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@ -1059,7 +1059,7 @@ void radf5_ps(const size_t ido, const size_t l1, const v4sf *RESTRICT cc, v4sf *
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ch_ref(1, 3, k) = vmadd(ti11, ci5, vmul(ti12, ci4));
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ch_ref(ido, 4, k) = vadd(cc_ref(1, k, 1), vmadd(tr12, cr2, vmul(tr11, cr3)));
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ch_ref(1, 5, k) = vsub(vmul(ti12, ci5), vmul(ti11, ci4));
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//printf("pffft: radf5, k=%d ch_ref=%f, ci4=%f\n", k, ch_ref(1, 5, k), ci4);
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//fmt::println("pffft: radf5, k={} ch_ref={:f}, ci4={:f}", k, ch_ref(1, 5, k), ci4);
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}
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if(ido == 1)
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return;
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@ -1534,10 +1534,10 @@ PFFFTSetupPtr pffft_new_setup(unsigned int N, pffft_transform_t transform)
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}
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void pffft_destroy_setup(gsl::owner<PFFFT_Setup*> s) noexcept
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void PFFFTSetupDeleter::operator()(gsl::owner<PFFFT_Setup*> setup) const noexcept
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{
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std::destroy_at(s);
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::operator delete[](gsl::owner<void*>{s}, V4sfAlignVal);
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std::destroy_at(setup);
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::operator delete[](gsl::owner<void*>{setup}, V4sfAlignVal);
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}
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#if !defined(PFFFT_SIMD_DISABLE)
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