mirror of
https://github.com/TorqueGameEngines/Torque3D.git
synced 2026-02-13 03:33:48 +00:00
Simple pass over the codebase to standardize the platform types.
This commit is contained in:
cpusci
parent
c75d6feb20
commit
4c35fd37af
189 changed files with 824 additions and 824 deletions
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@ -80,13 +80,13 @@ namespace CPUInfo {
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#ifndef TORQUE_OS_MAC
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static unsigned int CpuIDSupported(void);
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static unsigned int find_maskwidth(unsigned int);
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static unsigned int HWD_MTSupported(void);
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static unsigned int MaxLogicalProcPerPhysicalProc(void);
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static unsigned int MaxCorePerPhysicalProc(void);
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static unsigned char GetAPIC_ID(void);
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static unsigned char GetNzbSubID(unsigned char, unsigned char, unsigned char);
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static U32 CpuIDSupported(void);
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static U32 find_maskwidth(unsigned int);
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static U32 HWD_MTSupported(void);
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static U32 MaxLogicalProcPerPhysicalProc(void);
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static U32 MaxCorePerPhysicalProc(void);
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static U8 GetAPIC_ID(void);
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static U8 GetNzbSubID(U8, U8, U8);
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#endif
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static char g_s3Levels[2048];
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@ -97,9 +97,9 @@ namespace CPUInfo {
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// CpuIDSupported will return 0 if CPUID instruction is unavailable. Otherwise, it will return
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// the maximum supported standard function.
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//
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static unsigned int CpuIDSupported(void)
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static U32 CpuIDSupported(void)
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{
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unsigned int MaxInputValue;
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U32 MaxInputValue;
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// If CPUID instruction is supported
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#ifdef TORQUE_COMPILER_GCC
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try
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@ -153,12 +153,12 @@ namespace CPUInfo {
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// maximum value.
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//
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static unsigned int MaxCorePerPhysicalProc(void)
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static U32 MaxCorePerPhysicalProc(void)
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{
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unsigned int Regeax = 0;
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U32 Regeax = 0;
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if (!HWD_MTSupported()) return (unsigned int) 1; // Single core
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if (!HWD_MTSupported()) return (U32) 1; // Single core
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#ifdef TORQUE_COMPILER_GCC
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{
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asm
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@ -209,7 +209,7 @@ multi_core:
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#else
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# error Not implemented.
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#endif
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return (unsigned int)((Regeax & NUM_CORE_BITS) >> 26)+1;
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return (U32)((Regeax & NUM_CORE_BITS) >> 26)+1;
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}
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@ -218,11 +218,11 @@ multi_core:
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//
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// The function returns 0 when the hardware multi-threaded bit is not set.
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//
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static unsigned int HWD_MTSupported(void)
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static U32 HWD_MTSupported(void)
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{
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unsigned int Regedx = 0;
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U32 Regedx = 0;
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if ((CpuIDSupported() >= 1))
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@ -262,12 +262,12 @@ multi_core:
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// AVAILABLE logical processors per physical to be used by an application might be less than this
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// maximum value.
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//
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static unsigned int MaxLogicalProcPerPhysicalProc(void)
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static U32 MaxLogicalProcPerPhysicalProc(void)
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{
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unsigned int Regebx = 0;
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U32 Regebx = 0;
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if (!HWD_MTSupported()) return (unsigned int) 1;
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if (!HWD_MTSupported()) return (U32) 1;
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#ifdef TORQUE_COMPILER_GCC
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asm
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(
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@ -292,10 +292,10 @@ multi_core:
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}
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static unsigned char GetAPIC_ID(void)
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static U8 GetAPIC_ID(void)
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{
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unsigned int Regebx = 0;
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U32 Regebx = 0;
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#ifdef TORQUE_COMPILER_GCC
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asm
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(
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@ -324,9 +324,9 @@ multi_core:
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//
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// Determine the width of the bit field that can represent the value count_item.
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//
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unsigned int find_maskwidth(unsigned int CountItem)
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U32 find_maskwidth(U32 CountItem)
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{
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unsigned int MaskWidth,
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U32 MaskWidth,
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count = CountItem;
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#ifdef TORQUE_COMPILER_GCC
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asm
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@ -392,16 +392,16 @@ next:
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//
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// Extract the subset of bit field from the 8-bit value FullID. It returns the 8-bit sub ID value
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//
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static unsigned char GetNzbSubID(unsigned char FullID,
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unsigned char MaxSubIDValue,
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unsigned char ShiftCount)
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static U8 GetNzbSubID(U8 FullID,
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U8 MaxSubIDValue,
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U8 ShiftCount)
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{
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unsigned int MaskWidth;
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unsigned char MaskBits;
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U32 MaskWidth;
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U8 MaskBits;
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MaskWidth = find_maskwidth((unsigned int) MaxSubIDValue);
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MaskWidth = find_maskwidth((U32) MaxSubIDValue);
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MaskBits = (0xff << ShiftCount) ^
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((unsigned char) (0xff << (ShiftCount + MaskWidth)));
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((U8) (0xff << (ShiftCount + MaskWidth)));
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return (FullID & MaskBits);
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}
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@ -420,8 +420,8 @@ next:
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TotAvailCore = 1;
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PhysicalNum = 1;
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unsigned int numLPEnabled = 0;
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int MaxLPPerCore = 1;
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U32 numLPEnabled = 0;
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S32 MaxLPPerCore = 1;
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#ifdef TORQUE_OS_MAC
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@ -430,8 +430,8 @@ next:
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// like there isn't a way to do this that's working across all OSX incarnations
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// and machine configurations anyway.
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int numCPUs;
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int numPackages;
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S32 numCPUs;
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S32 numPackages;
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// Get the number of CPUs.
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@ -450,9 +450,9 @@ next:
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#else
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U32 dwAffinityMask;
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int j = 0;
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unsigned char apicID, PackageIDMask;
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unsigned char tblPkgID[256], tblCoreID[256], tblSMTID[256];
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S32 j = 0;
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U8 apicID, PackageIDMask;
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U8 tblPkgID[256], tblCoreID[256], tblSMTID[256];
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char tmp[256];
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#ifdef TORQUE_OS_LINUX
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@ -464,14 +464,14 @@ next:
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// Linux doesn't easily allow us to look at the Affinity Bitmask directly,
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// but it does provide an API to test affinity maskbits of the current process
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// against each logical processor visible under OS.
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int sysNumProcs = sysconf(_SC_NPROCESSORS_CONF); //This will tell us how many
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S32 sysNumProcs = sysconf(_SC_NPROCESSORS_CONF); //This will tell us how many
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//CPUs are currently enabled.
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//this will tell us which processors this process can run on.
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cpu_set_t allowedCPUs;
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sched_getaffinity(0, sizeof(allowedCPUs), &allowedCPUs);
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for (int i = 0; i < sysNumProcs; i++ )
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for (S32 i = 0; i < sysNumProcs; i++ )
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{
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if ( CPU_ISSET(i, &allowedCPUs) == 0 )
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return CONFIG_UserConfigIssue;
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@ -522,8 +522,8 @@ next:
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// processors per core
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tblSMTID[j] = GetNzbSubID(apicID, MaxLPPerCore, 0);
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unsigned char maxCorePPP = MaxCorePerPhysicalProc();
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unsigned char maskWidth = find_maskwidth(MaxLPPerCore);
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U8 maxCorePPP = MaxCorePerPhysicalProc();
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U8 maskWidth = find_maskwidth(MaxLPPerCore);
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tblCoreID[j] = GetNzbSubID(apicID, maxCorePPP, maskWidth);
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// Extract package ID, assume single cluster.
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@ -560,9 +560,9 @@ next:
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//
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// Count available cores (TotAvailCore) in the system
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//
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unsigned char CoreIDBucket[256];
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U8 CoreIDBucket[256];
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DWORD ProcessorMask, pCoreMask[256];
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unsigned int i, ProcessorNum;
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U32 i, ProcessorNum;
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CoreIDBucket[0] = tblPkgID[0] | tblCoreID[0];
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ProcessorMask = 1;
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@ -598,7 +598,7 @@ next:
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//
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// Count physical processor (PhysicalNum) in the system
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//
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unsigned char PackageIDBucket[256];
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U8 PackageIDBucket[256];
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DWORD pPackageMask[256];
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PackageIDBucket[0] = tblPkgID[0];
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