mirror of
https://github.com/TorqueGameEngines/Torque3D.git
synced 2026-01-20 04:34:48 +00:00
Implement better CPU Detection
This commit is contained in:
Jeff Hutchinson
parent
328319b853
commit
433d32f237
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@ -55,50 +55,11 @@
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/// @note These enums must be globally scoped so that they work with the inline assembly
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enum ProcessorType
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{
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// x86
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CPU_X86Compatible,
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CPU_Intel_Unknown,
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CPU_Intel_486,
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CPU_Intel_Pentium,
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CPU_Intel_PentiumMMX,
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CPU_Intel_PentiumPro,
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CPU_Intel_PentiumII,
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CPU_Intel_PentiumCeleron,
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CPU_Intel_PentiumIII,
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CPU_Intel_Pentium4,
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CPU_Intel_PentiumM,
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CPU_Intel_Core,
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CPU_Intel_Core2,
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CPU_Intel_Corei7Xeon, // Core i7 or Xeon
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CPU_AMD_K6,
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CPU_AMD_K6_2,
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CPU_AMD_K6_3,
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CPU_AMD_Athlon,
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CPU_AMD_Phenom,
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CPU_AMD_PhenomII,
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CPU_AMD_Bulldozer,
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CPU_AMD_Unknown,
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CPU_Cyrix_6x86,
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CPU_Cyrix_MediaGX,
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CPU_Cyrix_6x86MX,
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CPU_Cyrix_GXm, ///< Media GX w/ MMX
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CPU_Cyrix_Unknown,
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// PowerPC
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CPU_PowerPC_Unknown,
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CPU_PowerPC_601,
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CPU_PowerPC_603,
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CPU_PowerPC_603e,
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CPU_PowerPC_603ev,
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CPU_PowerPC_604,
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CPU_PowerPC_604e,
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CPU_PowerPC_604ev,
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CPU_PowerPC_G3,
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CPU_PowerPC_G4,
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CPU_PowerPC_G4_7450,
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CPU_PowerPC_G4_7455,
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CPU_PowerPC_G4_7447,
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CPU_PowerPC_G5,
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CPU_ArmCompatible,
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CPU_Intel,
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CPU_AMD,
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CPU_Apple
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};
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/// Properties for CPU.
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@ -31,12 +31,11 @@ Signal<void(void)> Platform::SystemInfoReady;
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enum CPUFlags
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{
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// EDX Register flags
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BIT_FPU = BIT(0),
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BIT_RDTSC = BIT(4),
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BIT_MMX = BIT(23),
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BIT_SSE = BIT(25),
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BIT_SSE2 = BIT(26),
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BIT_3DNOW = BIT(31),
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BIT_3DNOW = BIT(31), // only available for amd cpus in x86
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// These use a different value for comparison than the above flags (ECX Register)
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BIT_SSE3 = BIT(0),
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@ -47,241 +46,63 @@ enum CPUFlags
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// fill the specified structure with information obtained from asm code
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void SetProcessorInfo(Platform::SystemInfo_struct::Processor& pInfo,
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char* vendor, U32 processor, U32 properties, U32 properties2)
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char* vendor, char* brand, U32 processor, U32 properties, U32 properties2)
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{
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Platform::SystemInfo.processor.properties |= (properties & BIT_FPU) ? CPU_PROP_FPU : 0;
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Platform::SystemInfo.processor.properties |= (properties & BIT_RDTSC) ? CPU_PROP_RDTSC : 0;
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Platform::SystemInfo.processor.properties |= (properties & BIT_MMX) ? CPU_PROP_MMX : 0;
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// always assume FPU is available in 2021...
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pInfo.properties |= CPU_PROP_FPU;
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#if defined(TORQUE_CPU_X86) || defined(TORQUE_CPU_X64) || defined(TORQUE_CPU_ARM64)
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pInfo.properties |= CPU_PROP_LE;
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#endif
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#if defined(TORQUE_CPU_X64) || defined(TORQUE_CPU_ARM64)
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pInfo.properties |= CPU_PROP_64bit;
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#endif
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#if defined(TORQUE_CPU_X86) || defined(TORQUE_CPU_X64)
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pInfo.properties |= (properties & BIT_RDTSC) ? CPU_PROP_RDTSC : 0;
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pInfo.properties |= (properties & BIT_MMX) ? CPU_PROP_MMX : 0;
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pInfo.properties |= (properties & BIT_SSE) ? CPU_PROP_SSE : 0;
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pInfo.properties |= (properties & BIT_SSE2) ? CPU_PROP_SSE2 : 0;
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pInfo.properties |= (properties2 & BIT_SSE3) ? CPU_PROP_SSE3 : 0;
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pInfo.properties |= (properties2 & BIT_SSE3xt) ? CPU_PROP_SSE3xt : 0;
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pInfo.properties |= (properties2 & BIT_SSE4_1) ? CPU_PROP_SSE4_1 : 0;
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pInfo.properties |= (properties2 & BIT_SSE4_2) ? CPU_PROP_SSE4_2 : 0;
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#endif
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if (dStricmp(vendor, "GenuineIntel") == 0)
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{
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pInfo.properties |= (properties & BIT_SSE) ? CPU_PROP_SSE : 0;
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pInfo.properties |= (properties & BIT_SSE2) ? CPU_PROP_SSE2 : 0;
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pInfo.properties |= (properties2 & BIT_SSE3) ? CPU_PROP_SSE3 : 0;
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pInfo.properties |= (properties2 & BIT_SSE3xt) ? CPU_PROP_SSE3xt : 0;
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pInfo.properties |= (properties2 & BIT_SSE4_1) ? CPU_PROP_SSE4_1 : 0;
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pInfo.properties |= (properties2 & BIT_SSE4_2) ? CPU_PROP_SSE4_2 : 0;
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pInfo.type = CPU_Intel_Unknown;
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// switch on processor family code
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switch ((processor >> 8) & 0x0f)
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{
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case 4:
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pInfo.type = CPU_Intel_486;
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pInfo.name = StringTable->insert("Intel 486 class");
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break;
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// Pentium Family
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case 5:
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// switch on processor model code
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switch ((processor >> 4) & 0xf)
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{
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case 1:
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case 2:
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case 3:
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pInfo.type = CPU_Intel_Pentium;
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pInfo.name = StringTable->insert("Intel Pentium");
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break;
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case 4:
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pInfo.type = CPU_Intel_PentiumMMX;
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pInfo.name = StringTable->insert("Intel Pentium MMX");
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break;
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default:
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pInfo.type = CPU_Intel_Pentium;
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pInfo.name = StringTable->insert( "Intel (unknown)" );
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break;
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}
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break;
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// Pentium Pro/II/II family
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case 6:
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{
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U32 extendedModel = ( processor & 0xf0000 ) >> 16;
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// switch on processor model code
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switch ((processor >> 4) & 0xf)
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{
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case 1:
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pInfo.type = CPU_Intel_PentiumPro;
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pInfo.name = StringTable->insert("Intel Pentium Pro");
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break;
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case 3:
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case 5:
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pInfo.type = CPU_Intel_PentiumII;
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pInfo.name = StringTable->insert("Intel Pentium II");
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break;
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case 6:
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pInfo.type = CPU_Intel_PentiumCeleron;
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pInfo.name = StringTable->insert("Intel Pentium Celeron");
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break;
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case 7:
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case 8:
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case 11:
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pInfo.type = CPU_Intel_PentiumIII;
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pInfo.name = StringTable->insert("Intel Pentium III");
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break;
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case 0xA:
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if( extendedModel == 1)
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{
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pInfo.type = CPU_Intel_Corei7Xeon;
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pInfo.name = StringTable->insert( "Intel Core i7 / Xeon" );
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}
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else
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{
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pInfo.type = CPU_Intel_PentiumIII;
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pInfo.name = StringTable->insert( "Intel Pentium III Xeon" );
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}
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break;
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case 0xD:
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if( extendedModel == 1 )
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{
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pInfo.type = CPU_Intel_Corei7Xeon;
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pInfo.name = StringTable->insert( "Intel Core i7 / Xeon" );
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}
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else
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{
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pInfo.type = CPU_Intel_PentiumM;
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pInfo.name = StringTable->insert( "Intel Pentium/Celeron M" );
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}
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break;
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case 0xE:
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pInfo.type = CPU_Intel_Core;
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pInfo.name = StringTable->insert( "Intel Core" );
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break;
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case 0xF:
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pInfo.type = CPU_Intel_Core2;
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pInfo.name = StringTable->insert( "Intel Core 2" );
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break;
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default:
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pInfo.type = CPU_Intel_PentiumPro;
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pInfo.name = StringTable->insert( "Intel (unknown)" );
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break;
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}
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break;
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}
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// Pentium4 Family
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case 0xf:
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pInfo.type = CPU_Intel_Pentium4;
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pInfo.name = StringTable->insert( "Intel Pentium 4" );
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break;
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default:
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pInfo.type = CPU_Intel_Unknown;
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pInfo.name = StringTable->insert( "Intel (unknown)" );
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break;
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}
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pInfo.type = CPU_Intel;
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pInfo.name = StringTable->insert(brand ? brand : "Intel (Unknown)");
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}
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//--------------------------------------
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else if (dStricmp(vendor, "AuthenticAMD") == 0)
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{
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pInfo.name = StringTable->insert(brand ? brand : "AMD (unknown)");
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pInfo.type = CPU_AMD;
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// 3dnow! is only available in AMD cpus on x86. Otherwise its not reliably set.
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pInfo.properties |= (properties & BIT_3DNOW) ? CPU_PROP_3DNOW : 0;
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}
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else if (dStricmp(vendor, "Apple") == 0)
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{
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pInfo.name = StringTable->insert(brand ? brand : "Apple (unknown)");
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pInfo.type = CPU_Apple;
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}
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else
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if (dStricmp(vendor, "AuthenticAMD") == 0)
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{
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// AthlonXP processors support SSE
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pInfo.properties |= (properties & BIT_SSE) ? CPU_PROP_SSE : 0;
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pInfo.properties |= ( properties & BIT_SSE2 ) ? CPU_PROP_SSE2 : 0;
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pInfo.properties |= (properties & BIT_3DNOW) ? CPU_PROP_3DNOW : 0;
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// Phenom and PhenomII support SSE3, SSE4a
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pInfo.properties |= ( properties2 & BIT_SSE3 ) ? CPU_PROP_SSE3 : 0;
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pInfo.properties |= ( properties2 & BIT_SSE4_1 ) ? CPU_PROP_SSE4_1 : 0;
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// switch on processor family code
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switch ((processor >> 8) & 0xf)
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{
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// K6 Family
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case 5:
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// switch on processor model code
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switch ((processor >> 4) & 0xf)
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{
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case 0:
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case 1:
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case 2:
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case 3:
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pInfo.type = CPU_AMD_K6_3;
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pInfo.name = StringTable->insert("AMD K5");
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break;
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case 4:
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case 5:
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case 6:
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case 7:
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pInfo.type = CPU_AMD_K6;
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pInfo.name = StringTable->insert("AMD K6");
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break;
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case 8:
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pInfo.type = CPU_AMD_K6_2;
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pInfo.name = StringTable->insert("AMD K6-2");
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break;
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case 9:
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case 10:
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case 11:
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case 12:
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case 13:
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case 14:
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case 15:
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pInfo.type = CPU_AMD_K6_3;
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pInfo.name = StringTable->insert("AMD K6-3");
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break;
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}
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break;
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// Athlon Family
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case 6:
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pInfo.type = CPU_AMD_Athlon;
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pInfo.name = StringTable->insert("AMD Athlon");
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break;
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// Phenom Family
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case 15:
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pInfo.type = CPU_AMD_Phenom;
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pInfo.name = StringTable->insert("AMD Phenom");
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break;
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// Phenom II Family
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case 16:
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pInfo.type = CPU_AMD_PhenomII;
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pInfo.name = StringTable->insert("AMD Phenom II");
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break;
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// Bulldozer Family
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case 17:
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pInfo.type = CPU_AMD_Bulldozer;
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pInfo.name = StringTable->insert("AMD Bulldozer");
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break;
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default:
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pInfo.type = CPU_AMD_Unknown;
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pInfo.name = StringTable->insert("AMD (unknown)");
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break;
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}
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}
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//--------------------------------------
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else
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if (dStricmp(vendor, "CyrixInstead") == 0)
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{
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switch (processor)
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{
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case 0x520:
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pInfo.type = CPU_Cyrix_6x86;
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pInfo.name = StringTable->insert("Cyrix 6x86");
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break;
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case 0x440:
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pInfo.type = CPU_Cyrix_MediaGX;
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pInfo.name = StringTable->insert("Cyrix Media GX");
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break;
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case 0x600:
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pInfo.type = CPU_Cyrix_6x86MX;
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pInfo.name = StringTable->insert("Cyrix 6x86mx/MII");
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break;
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case 0x540:
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pInfo.type = CPU_Cyrix_GXm;
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pInfo.name = StringTable->insert("Cyrix GXm");
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break;
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default:
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pInfo.type = CPU_Cyrix_Unknown;
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pInfo.name = StringTable->insert("Cyrix (unknown)");
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break;
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}
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}
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{
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#if defined(TORQUE_CPU_X86) || defined(TORQUE_CPU_X64)
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pInfo.name = StringTable->insert(brand ? brand : "x86 Compatible (unknown)");
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pInfo.type = CPU_X86Compatible;
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#elif defined(TORQUE_CPU_ARM64)
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pInfo.name = StringTable->insert(brand ? brand : "Arm Compatible (unknown)");
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pInfo.type = CPU_ArmCompatible;
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#else
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#error "Unknown CPU Architecture"
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#endif
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}
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// Get multithreading caps.
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CPUInfo::EConfig config = CPUInfo::CPUCount( pInfo.numLogicalProcessors, pInfo.numAvailableCores, pInfo.numPhysicalProcessors );
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pInfo.isHyperThreaded = CPUInfo::isHyperThreaded( config );
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pInfo.isMultiCore = CPUInfo::isMultiCore( config );
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@ -30,7 +30,7 @@
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Platform::SystemInfo_struct Platform::SystemInfo;
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extern void PlatformBlitInit();
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extern void SetProcessorInfo(Platform::SystemInfo_struct::Processor& pInfo,
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char* vendor, U32 processor, U32 properties, U32 properties2); // platform/platformCPU.cc
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char* vendor, char* brand, U32 processor, U32 properties, U32 properties2); // platform/platformCPU.cc
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void Processor::init()
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{
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@ -45,7 +45,7 @@ void Processor::init()
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Platform::SystemInfo.processor.type = CPU_X86Compatible;
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Platform::SystemInfo.processor.name = StringTable->insert("Unknown x86 Compatible");
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Platform::SystemInfo.processor.mhz = 0;
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Platform::SystemInfo.processor.properties = CPU_PROP_C | CPU_PROP_LE;
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Platform::SystemInfo.processor.properties = CPU_PROP_C;
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char vendor[0x20];
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dMemset(vendor, 0, sizeof(vendor));
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@ -65,7 +65,31 @@ void Processor::init()
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properties = cpuInfo[3]; // edx
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properties2 = cpuInfo[2]; // ecx
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SetProcessorInfo(Platform::SystemInfo.processor, vendor, processor, properties, properties2);
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char brand[0x40];
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dMemset(brand, 0, sizeof(brand));
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S32 extendedInfo[4];
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__cpuid(extendedInfo, 0x80000000);
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S32 numberExtendedIds = extendedInfo[0];
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// Sets brand
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if (numberExtendedIds >= 0x80000004)
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{
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int offset = 0;
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for (int i = 0; i < 3; ++i)
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{
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S32 brandInfo[4];
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__cpuidex(brandInfo, 0x80000002 + i, 0);
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*reinterpret_cast<int*>(brand + offset + 0) = brandInfo[0];
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*reinterpret_cast<int*>(brand + offset + 4) = brandInfo[1];
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*reinterpret_cast<int*>(brand + offset + 8) = brandInfo[2];
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*reinterpret_cast<int*>(brand + offset + 12) = brandInfo[3];
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offset += sizeof(S32) * 4;
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}
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}
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SetProcessorInfo(Platform::SystemInfo.processor, vendor, brand, processor, properties, properties2);
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// now calculate speed of processor...
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U32 nearmhz = 0; // nearest rounded mhz
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@ -126,6 +150,14 @@ void Processor::init()
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Con::printf( " SSE detected" );
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if( Platform::SystemInfo.processor.properties & CPU_PROP_SSE2 )
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Con::printf( " SSE2 detected" );
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if (Platform::SystemInfo.processor.properties & CPU_PROP_SSE3)
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Con::printf( " SSE3 detected" );
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if (Platform::SystemInfo.processor.properties & CPU_PROP_SSE3xt)
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Con::printf( " SSE3ex detected ");
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if (Platform::SystemInfo.processor.properties & CPU_PROP_SSE4_1)
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Con::printf( " SSE4.1 detected" );
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if (Platform::SystemInfo.processor.properties & CPU_PROP_SSE4_2)
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Con::printf( " SSE4.2 detected" );
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if( Platform::SystemInfo.processor.isHyperThreaded )
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Con::printf( " HT detected" );
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if( Platform::SystemInfo.processor.properties & CPU_PROP_MP )
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