flush out windows cpu detection.

This commit is contained in:
Jeff Hutchinson 2021-09-26 23:43:06 -04:00
parent ca0a5d41a7
commit 24e5db942b
5 changed files with 136 additions and 248 deletions

View file

@ -70,17 +70,16 @@ enum ProcessorProperties
CPU_PROP_MMX = (1<<2), ///< Supports MMX instruction set extension.
CPU_PROP_3DNOW = (1<<3), ///< Supports AMD 3dNow! instruction set extension.
CPU_PROP_SSE = (1<<4), ///< Supports SSE instruction set extension.
CPU_PROP_RDTSC = (1<<5), ///< Supports Read Time Stamp Counter op.
CPU_PROP_SSE2 = (1<<6), ///< Supports SSE2 instruction set extension.
CPU_PROP_SSE3 = (1<<7), ///< Supports SSE3 instruction set extension.
CPU_PROP_SSE3ex = (1<<8), ///< Supports extended SSE3 instruction set
CPU_PROP_SSE4_1 = (1<<9), ///< Supports SSE4_1 instruction set extension.
CPU_PROP_SSE4_2 = (1<<10), ///< Supports SSE4_2 instruction set extension.
CPU_PROP_AVX = (1<<11), ///< Supports AVX256 instruction set extension.
CPU_PROP_MP = (1<<12), ///< This is a multi-processor system.
CPU_PROP_LE = (1<<13), ///< This processor is LITTLE ENDIAN.
CPU_PROP_64bit = (1<<14), ///< This processor is 64-bit capable
CPU_PROP_NEON = (1<<15), ///< Supports the Arm Neon instruction set extension.
CPU_PROP_SSE2 = (1<<5), ///< Supports SSE2 instruction set extension.
CPU_PROP_SSE3 = (1<<6), ///< Supports SSE3 instruction set extension.
CPU_PROP_SSE3ex = (1<<7), ///< Supports Supplemental SSE3 instruction set
CPU_PROP_SSE4_1 = (1<<8), ///< Supports SSE4_1 instruction set extension.
CPU_PROP_SSE4_2 = (1<<9), ///< Supports SSE4_2 instruction set extension.
CPU_PROP_AVX = (1<<10), ///< Supports AVX256 instruction set extension.
CPU_PROP_MP = (1<<11), ///< This is a multi-processor system.
CPU_PROP_LE = (1<<12), ///< This processor is LITTLE ENDIAN.
CPU_PROP_64bit = (1<<13), ///< This processor is 64-bit capable
CPU_PROP_NEON = (1<<14), ///< Supports the Arm Neon instruction set extension.
};
/// Processor info manager.