mirror of
https://github.com/TorqueGameEngines/Torque3D.git
synced 2026-03-10 16:00:46 +00:00
flush out windows cpu detection.
This commit is contained in:
Jeff Hutchinson
parent
ca0a5d41a7
commit
24e5db942b
5 changed files with 136 additions and 248 deletions
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@ -70,17 +70,16 @@ enum ProcessorProperties
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CPU_PROP_MMX = (1<<2), ///< Supports MMX instruction set extension.
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CPU_PROP_3DNOW = (1<<3), ///< Supports AMD 3dNow! instruction set extension.
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CPU_PROP_SSE = (1<<4), ///< Supports SSE instruction set extension.
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CPU_PROP_RDTSC = (1<<5), ///< Supports Read Time Stamp Counter op.
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CPU_PROP_SSE2 = (1<<6), ///< Supports SSE2 instruction set extension.
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CPU_PROP_SSE3 = (1<<7), ///< Supports SSE3 instruction set extension.
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CPU_PROP_SSE3ex = (1<<8), ///< Supports extended SSE3 instruction set
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CPU_PROP_SSE4_1 = (1<<9), ///< Supports SSE4_1 instruction set extension.
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CPU_PROP_SSE4_2 = (1<<10), ///< Supports SSE4_2 instruction set extension.
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CPU_PROP_AVX = (1<<11), ///< Supports AVX256 instruction set extension.
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CPU_PROP_MP = (1<<12), ///< This is a multi-processor system.
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CPU_PROP_LE = (1<<13), ///< This processor is LITTLE ENDIAN.
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CPU_PROP_64bit = (1<<14), ///< This processor is 64-bit capable
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CPU_PROP_NEON = (1<<15), ///< Supports the Arm Neon instruction set extension.
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CPU_PROP_SSE2 = (1<<5), ///< Supports SSE2 instruction set extension.
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CPU_PROP_SSE3 = (1<<6), ///< Supports SSE3 instruction set extension.
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CPU_PROP_SSE3ex = (1<<7), ///< Supports Supplemental SSE3 instruction set
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CPU_PROP_SSE4_1 = (1<<8), ///< Supports SSE4_1 instruction set extension.
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CPU_PROP_SSE4_2 = (1<<9), ///< Supports SSE4_2 instruction set extension.
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CPU_PROP_AVX = (1<<10), ///< Supports AVX256 instruction set extension.
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CPU_PROP_MP = (1<<11), ///< This is a multi-processor system.
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CPU_PROP_LE = (1<<12), ///< This processor is LITTLE ENDIAN.
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CPU_PROP_64bit = (1<<13), ///< This processor is 64-bit capable
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CPU_PROP_NEON = (1<<14), ///< Supports the Arm Neon instruction set extension.
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};
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/// Processor info manager.
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@ -1,128 +0,0 @@
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;-----------------------------------------------------------------------------
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; Copyright (c) 2012 GarageGames, LLC
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;
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; Permission is hereby granted, free of charge, to any person obtaining a copy
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; of this software and associated documentation files (the "Software"), to
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; deal in the Software without restriction, including without limitation the
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; rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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; sell copies of the Software, and to permit persons to whom the Software is
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; furnished to do so, subject to the following conditions:
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;
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; The above copyright notice and this permission notice shall be included in
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; all copies or substantial portions of the Software.
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;
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; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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; IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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; FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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; AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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; LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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; FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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; IN THE SOFTWARE.
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;-----------------------------------------------------------------------------
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segment .text
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; syntax: export_fn <function name>
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%macro export_fn 1
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%ifidn __OUTPUT_FORMAT__, elf
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; No underscore needed for ELF object files
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global %1
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%1:
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%else
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global _%1
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_%1:
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%endif
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%endmacro
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; push registers
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%macro pushreg 0
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; pushad
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push ebx
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push ebp
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push esi
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push edi
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%endmacro
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; pop registers
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%macro popreg 0
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pop edi
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pop esi
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pop ebp
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pop ebx
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; popad
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%endmacro
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; void detectX86CPUInfo(char *vendor, U32 *processor, U32 *properties);
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export_fn detectX86CPUInfo
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push ebp
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mov ebp, esp
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pushreg
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push edx
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push ecx
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pushfd
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pushfd ; save EFLAGS to stack
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pop eax ; move EFLAGS into EAX
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mov ebx, eax
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xor eax, 0x200000 ; flip bit 21
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push eax
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popfd ; restore EFLAGS
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pushfd
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pop eax
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cmp eax, ebx
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jz EXIT ; doesn't support CPUID instruction
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;
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; get vendor information using CPUID eax == 0
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xor eax, eax
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cpuid
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; store the vendor tag (12 bytes in ebx, edx, ecx) in the first parameter,
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; which should be a char[13]
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push eax ; save eax
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mov eax, [ebp+8] ; store the char* address in eax
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mov [eax], ebx ; move ebx into the first 4 bytes
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add eax, 4 ; advance the char* 4 bytes
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mov [eax], edx ; move edx into the next 4 bytes
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add eax, 4 ; advance the char* 4 bytes
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mov [eax], ecx ; move ecx into the last 4 bytes
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pop eax ; restore eax
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; get generic extended CPUID info
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mov eax, 1
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cpuid ; eax=1, so cpuid queries feature information
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and eax, 0x0fff3fff
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push ecx
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mov ecx, [ebp+12]
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mov [ecx], eax ; just store the model bits in processor param
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mov ecx, [ebp+16]
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mov [ecx], edx ; set properties param
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pop ecx
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; want to check for 3DNow(tm).
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; need to see if extended cpuid functions present.
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mov eax, 0x80000000
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cpuid
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cmp eax, 0x80000000
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jbe MAYBE_3DLATER
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mov eax, 0x80000001
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cpuid
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; 3DNow if bit 31 set -> put bit in our properties
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and edx, 0x80000000
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push eax
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mov eax, [ebp+16]
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or [eax], edx
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pop eax
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MAYBE_3DLATER:
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EXIT:
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popfd
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pop ecx
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pop edx
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popreg
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pop ebp
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ret
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@ -96,7 +96,7 @@ static void detectCpuFeatures(U32 &procflags)
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U32 lraw;
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// All Cpus have fpu
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procflags = CPU_PROP_FPU;
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procflags = CPU_PROP_C | CPU_PROP_FPU;
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#if defined(TORQUE_CPU_X86) || defined(TORQUE_CPU_X64)
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@ -215,6 +215,9 @@ void Processor::init()
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Con::printf(" AVX detected");
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if (Platform::SystemInfo.processor.properties & CPU_PROP_NEON)
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Con::printf(" Neon detected");
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if (Platform::SystemInfo.processor.properties & CPU_PROP_MP)
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Con::printf(" MultiCore CPU detected [%i cores, %i logical]", Platform::SystemInfo.processor.numPhysicalProcessors, Platform::SystemInfo.processor.numLogicalProcessors);
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Con::printf( "" );
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@ -24,49 +24,15 @@
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#include "platformWin32/platformWin32.h"
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#include "console/console.h"
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#include "core/stringTable.h"
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#include "platform/platformCPUCount.h"
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#include <math.h>
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#include <intrin.h>
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Platform::SystemInfo_struct Platform::SystemInfo;
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extern void PlatformBlitInit();
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extern void SetProcessorInfo(Platform::SystemInfo_struct::Processor& pInfo,
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char* vendor, char* brand, U32 processor, U32 properties, U32 properties2); // platform/platformCPU.cc
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void Processor::init()
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static void getBrand(char* brand)
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{
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// Reference:
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// www.cyrix.com
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// www.amd.com
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// www.intel.com
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// http://developer.intel.com/design/PentiumII/manuals/24512701.pdf
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Con::printf("Processor Init:");
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Platform::SystemInfo.processor.type = CPU_X86Compatible;
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Platform::SystemInfo.processor.name = StringTable->insert("Unknown x86 Compatible");
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Platform::SystemInfo.processor.mhz = 0;
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Platform::SystemInfo.processor.properties = CPU_PROP_C;
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char vendor[0x20];
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dMemset(vendor, 0, sizeof(vendor));
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U32 properties = 0;
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U32 processor = 0;
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U32 properties2 = 0;
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S32 vendorInfo[4];
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__cpuid(vendorInfo, 0);
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*reinterpret_cast<int*>(vendor) = vendorInfo[1]; // ebx
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*reinterpret_cast<int*>(vendor + 4) = vendorInfo[3]; // edx
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*reinterpret_cast<int*>(vendor + 8) = vendorInfo[2]; // ecx
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S32 cpuInfo[4];
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__cpuid(cpuInfo, 1);
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processor = cpuInfo[0]; // eax
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properties = cpuInfo[3]; // edx
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properties2 = cpuInfo[2]; // ecx
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char brand[0x40];
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dMemset(brand, 0, sizeof(brand));
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S32 extendedInfo[4];
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__cpuid(extendedInfo, 0x80000000);
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S32 numberExtendedIds = extendedInfo[0];
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@ -88,12 +54,93 @@ void Processor::init()
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offset += sizeof(S32) * 4;
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}
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}
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}
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SetProcessorInfo(Platform::SystemInfo.processor, vendor, brand, processor, properties, properties2);
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enum CpuFlags
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{
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// EDX Register flags
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BIT_MMX = BIT(23),
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BIT_SSE = BIT(25),
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BIT_SSE2 = BIT(26),
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BIT_3DNOW = BIT(31), // only available for amd cpus in x86
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// now calculate speed of processor...
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U32 nearmhz = 0; // nearest rounded mhz
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U32 mhz = 0; // calculated value.
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// These use a different value for comparison than the above flags (ECX Register)
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BIT_SSE3 = BIT(0),
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BIT_SSE3ex = BIT(9),
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BIT_SSE4_1 = BIT(19),
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BIT_SSE4_2 = BIT(20),
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BIT_XSAVE_RESTORE = BIT(27),
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BIT_AVX = BIT(28),
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};
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static void detectCpuFeatures(Platform::SystemInfo_struct::Processor &processor)
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{
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S32 cpuInfo[4];
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__cpuid(cpuInfo, 1);
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U32 eax = cpuInfo[0]; // eax
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U32 edx = cpuInfo[3]; // edx
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U32 ecx = cpuInfo[2]; // ecx
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if (processor.type == ProcessorType::CPU_AMD)
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processor.properties |= (edx & BIT_3DNOW) ? CPU_PROP_3DNOW : 0;
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processor.properties |= (edx & BIT_MMX) ? CPU_PROP_MMX : 0;
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processor.properties |= (edx & BIT_SSE) ? CPU_PROP_SSE : 0;
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processor.properties |= (edx & BIT_SSE2) ? CPU_PROP_SSE2 : 0;
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processor.properties |= (ecx & BIT_SSE3) ? CPU_PROP_SSE3 : 0;
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processor.properties |= (ecx & BIT_SSE3ex) ? CPU_PROP_SSE3ex : 0;
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processor.properties |= (ecx & BIT_SSE4_1) ? CPU_PROP_SSE4_1 : 0;
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processor.properties |= (ecx & BIT_SSE4_2) ? CPU_PROP_SSE4_2 : 0;
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// AVX detection requires that xsaverestore is supported
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if (ecx & BIT_XSAVE_RESTORE && ecx & BIT_AVX)
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{
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bool supportsAVX = _xgetbv(_XCR_XFEATURE_ENABLED_MASK) & 0x6;
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if (supportsAVX)
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{
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processor.properties |= CPU_PROP_AVX;
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}
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}
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if (processor.isMultiCore)
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processor.properties |= CPU_PROP_MP;
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#ifdef TORQUE_CPU_X64
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processor.properties |= CPU_PROP_64bit;
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#endif
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}
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void Processor::init()
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{
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// Reference:
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// www.cyrix.com
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// www.amd.com
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// www.intel.com
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// http://developer.intel.com/design/PentiumII/manuals/24512701.pdf
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Platform::SystemInfo.processor.type = CPU_X86Compatible;
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Platform::SystemInfo.processor.name = StringTable->insert("Unknown x86 Compatible");
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Platform::SystemInfo.processor.mhz = 0;
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Platform::SystemInfo.processor.properties = CPU_PROP_C | CPU_PROP_FPU | CPU_PROP_LE;
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char vendor[0x20];
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dMemset(vendor, 0, sizeof(vendor));
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S32 vendorInfo[4];
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__cpuid(vendorInfo, 0);
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*reinterpret_cast<int*>(vendor) = vendorInfo[1]; // ebx
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*reinterpret_cast<int*>(vendor + 4) = vendorInfo[3]; // edx
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*reinterpret_cast<int*>(vendor + 8) = vendorInfo[2]; // ecx
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char brand[0x40];
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dMemset(brand, 0, sizeof(brand));
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getBrand(brand);
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SetProcessoInfo(Platform::SystemInfo.processor, vendor, brand);
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detectCpuFeatures(Platform::SystemInfo.processor);
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U32 mhz = 1000; // default if it can't be found
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LONG result;
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DWORD data = 0;
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@ -107,64 +154,37 @@ void Processor::init()
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result = ::RegQueryValueExA (hKey, "~MHz",NULL, NULL,(LPBYTE)&data, &dataSize);
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if (result == ERROR_SUCCESS)
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nearmhz = mhz = data;
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mhz = data;
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::RegCloseKey(hKey);
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}
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Platform::SystemInfo.processor.mhz = mhz;
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if (mhz==0)
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{
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Con::printf(" %s, (Unknown) Mhz", Platform::SystemInfo.processor.name);
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// stick SOMETHING in so it isn't ZERO.
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Platform::SystemInfo.processor.mhz = 200; // seems a decent value.
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}
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else
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{
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if (nearmhz >= 1000)
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Con::printf(" %s, ~%.2f Ghz", Platform::SystemInfo.processor.name, ((float)nearmhz)/1000.0f);
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else
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Con::printf(" %s, ~%d Mhz", Platform::SystemInfo.processor.name, nearmhz);
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if (nearmhz != mhz)
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{
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if (mhz >= 1000)
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Con::printf(" (timed at roughly %.2f Ghz)", ((float)mhz)/1000.0f);
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else
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Con::printf(" (timed at roughly %d Mhz)", mhz);
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}
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}
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if( Platform::SystemInfo.processor.numAvailableCores > 0
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|| Platform::SystemInfo.processor.numPhysicalProcessors > 0
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|| Platform::SystemInfo.processor.isHyperThreaded )
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Platform::SystemInfo.processor.properties |= CPU_PROP_MP;
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if (Platform::SystemInfo.processor.properties & CPU_PROP_FPU)
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Con::printf( " FPU detected" );
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Con::printf("Processor Init:");
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Con::printf(" Processor: %s", Platform::SystemInfo.processor.name);
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if (Platform::SystemInfo.processor.properties & CPU_PROP_MMX)
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Con::printf( " MMX detected" );
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Con::printf(" MMX detected" );
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if (Platform::SystemInfo.processor.properties & CPU_PROP_3DNOW)
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Con::printf( " 3DNow detected" );
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Con::printf(" 3DNow detected" );
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if (Platform::SystemInfo.processor.properties & CPU_PROP_SSE)
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Con::printf( " SSE detected" );
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if( Platform::SystemInfo.processor.properties & CPU_PROP_SSE2 )
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Con::printf( " SSE2 detected" );
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Con::printf(" SSE detected" );
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if (Platform::SystemInfo.processor.properties & CPU_PROP_SSE2)
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Con::printf(" SSE2 detected" );
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if (Platform::SystemInfo.processor.properties & CPU_PROP_SSE3)
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Con::printf( " SSE3 detected" );
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if (Platform::SystemInfo.processor.properties & CPU_PROP_SSE3xt)
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Con::printf( " SSE3ex detected ");
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Con::printf(" SSE3 detected" );
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if (Platform::SystemInfo.processor.properties & CPU_PROP_SSE3ex)
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Con::printf(" SSE3ex detected ");
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if (Platform::SystemInfo.processor.properties & CPU_PROP_SSE4_1)
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Con::printf( " SSE4.1 detected" );
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Con::printf(" SSE4.1 detected" );
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if (Platform::SystemInfo.processor.properties & CPU_PROP_SSE4_2)
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Con::printf( " SSE4.2 detected" );
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if( Platform::SystemInfo.processor.isHyperThreaded )
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Con::printf( " HT detected" );
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if( Platform::SystemInfo.processor.properties & CPU_PROP_MP )
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Con::printf( " MP detected [%i cores, %i logical, %i physical]",
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Platform::SystemInfo.processor.numAvailableCores,
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Platform::SystemInfo.processor.numLogicalProcessors,
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Platform::SystemInfo.processor.numPhysicalProcessors );
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Con::printf(" SSE4.2 detected" );
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if (Platform::SystemInfo.processor.properties & CPU_PROP_AVX)
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Con::printf(" AVX detected");
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if (Platform::SystemInfo.processor.properties & CPU_PROP_MP)
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Con::printf(" MultiCore CPU detected [%i cores, %i logical]", Platform::SystemInfo.processor.numPhysicalProcessors, Platform::SystemInfo.processor.numLogicalProcessors);
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Con::printf(" ");
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PlatformBlitInit();
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@ -26,6 +26,7 @@
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#if defined( TORQUE_OS_WIN )
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#include "platform/platformCPUCount.h"
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#include "console/console.h"
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#include <windows.h>
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#include <intrin.h>
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#include <stdio.h>
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@ -52,12 +53,10 @@ namespace CPUInfo {
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return bitSetCount;
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}
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EConfig CPUCount( U32& TotAvailLogical, U32& TotAvailCore, U32& PhysicalNum )
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EConfig CPUCount( U32& TotAvailLogical, U32& TotAvailCore )
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{
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EConfig StatusFlag = CONFIG_UserConfigIssue;
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TotAvailLogical = 0;
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TotAvailCore = 0;
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PhysicalNum = 0;
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PSYSTEM_LOGICAL_PROCESSOR_INFORMATION buffer = NULL;
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DWORD returnLength = 0;
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@ -68,42 +67,37 @@ namespace CPUInfo {
|
|||
|
||||
rc = GetLogicalProcessorInformation( buffer, &returnLength );
|
||||
|
||||
// if we fail, assume single threaded
|
||||
if( FALSE == rc )
|
||||
{
|
||||
free( buffer );
|
||||
return StatusFlag;
|
||||
Con::errorf("Unable to determine CPU Count, assuming 1 core");
|
||||
TotAvailCore = 1;
|
||||
TotAvailLogical = 1;
|
||||
return CONFIG_SingleCoreAndHTNotCapable;
|
||||
}
|
||||
|
||||
#pragma push
|
||||
#pragma warning (disable: 6011)
|
||||
PSYSTEM_LOGICAL_PROCESSOR_INFORMATION ptr = buffer;
|
||||
|
||||
DWORD byteOffset = 0;
|
||||
while( byteOffset + sizeof( SYSTEM_LOGICAL_PROCESSOR_INFORMATION ) <= returnLength )
|
||||
{
|
||||
switch( ptr->Relationship )
|
||||
{
|
||||
|
||||
case RelationProcessorCore:
|
||||
if (ptr->Relationship == RelationProcessorCore)
|
||||
{
|
||||
TotAvailCore++;
|
||||
|
||||
// A hyperthreaded core supplies more than one logical processor.
|
||||
TotAvailLogical += CountSetBits( ptr->ProcessorMask );
|
||||
break;
|
||||
|
||||
case RelationProcessorPackage:
|
||||
// Logical processors share a physical package.
|
||||
PhysicalNum++;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
TotAvailLogical += CountSetBits(ptr->ProcessorMask);
|
||||
}
|
||||
|
||||
byteOffset += sizeof( SYSTEM_LOGICAL_PROCESSOR_INFORMATION );
|
||||
ptr++;
|
||||
}
|
||||
}
|
||||
|
||||
free( buffer );
|
||||
#pragma pop
|
||||
|
||||
StatusFlag = CONFIG_SingleCoreAndHTNotCapable;
|
||||
EConfig StatusFlag = CONFIG_SingleCoreAndHTNotCapable;
|
||||
|
||||
if( TotAvailCore == 1 && TotAvailLogical > TotAvailCore )
|
||||
StatusFlag = CONFIG_SingleCoreHTEnabled;
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue