mirror of
https://github.com/TorqueGameEngines/Torque3D.git
synced 2026-03-02 12:03:51 +00:00
Merge branch 'Preview4_0' into feature-vfs-security
This commit is contained in:
Robert MacGregor
commit
161ffc62fe
3013 changed files with 348715 additions and 182470 deletions
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@ -24,13 +24,89 @@
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#include "platformWin32/platformWin32.h"
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#include "console/console.h"
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#include "core/stringTable.h"
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#include "platform/platformCPUCount.h"
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#include <math.h>
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#include <intrin.h>
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Platform::SystemInfo_struct Platform::SystemInfo;
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extern void PlatformBlitInit();
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extern void SetProcessorInfo(Platform::SystemInfo_struct::Processor& pInfo,
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char* vendor, U32 processor, U32 properties, U32 properties2); // platform/platformCPU.cc
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static void getBrand(char* brand)
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{
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S32 extendedInfo[4];
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__cpuid(extendedInfo, 0x80000000);
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S32 numberExtendedIds = extendedInfo[0];
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// Sets brand
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if (numberExtendedIds >= 0x80000004)
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{
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int offset = 0;
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for (int i = 0; i < 3; ++i)
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{
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S32 brandInfo[4];
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__cpuidex(brandInfo, 0x80000002 + i, 0);
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*reinterpret_cast<int*>(brand + offset + 0) = brandInfo[0];
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*reinterpret_cast<int*>(brand + offset + 4) = brandInfo[1];
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*reinterpret_cast<int*>(brand + offset + 8) = brandInfo[2];
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*reinterpret_cast<int*>(brand + offset + 12) = brandInfo[3];
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offset += sizeof(S32) * 4;
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}
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}
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}
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enum CpuFlags
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{
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// EDX Register flags
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BIT_MMX = BIT(23),
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BIT_SSE = BIT(25),
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BIT_SSE2 = BIT(26),
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BIT_3DNOW = BIT(31), // only available for amd cpus in x86
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// These use a different value for comparison than the above flags (ECX Register)
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BIT_SSE3 = BIT(0),
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BIT_SSE3ex = BIT(9),
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BIT_SSE4_1 = BIT(19),
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BIT_SSE4_2 = BIT(20),
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BIT_XSAVE_RESTORE = BIT(27),
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BIT_AVX = BIT(28),
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};
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static void detectCpuFeatures(Platform::SystemInfo_struct::Processor &processor)
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{
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S32 cpuInfo[4];
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__cpuid(cpuInfo, 1);
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U32 eax = cpuInfo[0]; // eax
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U32 edx = cpuInfo[3]; // edx
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U32 ecx = cpuInfo[2]; // ecx
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processor.properties |= (edx & BIT_MMX) ? CPU_PROP_MMX : 0;
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processor.properties |= (edx & BIT_SSE) ? CPU_PROP_SSE : 0;
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processor.properties |= (edx & BIT_SSE2) ? CPU_PROP_SSE2 : 0;
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processor.properties |= (ecx & BIT_SSE3) ? CPU_PROP_SSE3 : 0;
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processor.properties |= (ecx & BIT_SSE3ex) ? CPU_PROP_SSE3ex : 0;
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processor.properties |= (ecx & BIT_SSE4_1) ? CPU_PROP_SSE4_1 : 0;
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processor.properties |= (ecx & BIT_SSE4_2) ? CPU_PROP_SSE4_2 : 0;
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// AVX detection requires that xsaverestore is supported
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if (ecx & BIT_XSAVE_RESTORE && ecx & BIT_AVX)
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{
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bool supportsAVX = _xgetbv(_XCR_XFEATURE_ENABLED_MASK) & 0x6;
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if (supportsAVX)
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{
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processor.properties |= CPU_PROP_AVX;
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}
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}
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if (processor.isMultiCore)
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processor.properties |= CPU_PROP_MP;
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#ifdef TORQUE_CPU_X64
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processor.properties |= CPU_PROP_64bit;
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#endif
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}
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void Processor::init()
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{
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@ -40,18 +116,13 @@ void Processor::init()
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// www.intel.com
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// http://developer.intel.com/design/PentiumII/manuals/24512701.pdf
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Con::printf("Processor Init:");
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Platform::SystemInfo.processor.type = CPU_X86Compatible;
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Platform::SystemInfo.processor.name = StringTable->insert("Unknown x86 Compatible");
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Platform::SystemInfo.processor.mhz = 0;
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Platform::SystemInfo.processor.properties = CPU_PROP_C | CPU_PROP_LE;
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Platform::SystemInfo.processor.properties = CPU_PROP_C | CPU_PROP_FPU | CPU_PROP_LE;
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char vendor[0x20];
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dMemset(vendor, 0, sizeof(vendor));
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U32 properties = 0;
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U32 processor = 0;
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U32 properties2 = 0;
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S32 vendorInfo[4];
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__cpuid(vendorInfo, 0);
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@ -59,17 +130,14 @@ void Processor::init()
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*reinterpret_cast<int*>(vendor + 4) = vendorInfo[3]; // edx
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*reinterpret_cast<int*>(vendor + 8) = vendorInfo[2]; // ecx
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S32 cpuInfo[4];
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__cpuid(cpuInfo, 1);
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processor = cpuInfo[0]; // eax
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properties = cpuInfo[3]; // edx
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properties2 = cpuInfo[2]; // ecx
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char brand[0x40];
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dMemset(brand, 0, sizeof(brand));
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getBrand(brand);
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SetProcessorInfo(Platform::SystemInfo.processor, vendor, processor, properties, properties2);
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SetProcessorInfo(Platform::SystemInfo.processor, vendor, brand);
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detectCpuFeatures(Platform::SystemInfo.processor);
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// now calculate speed of processor...
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U32 nearmhz = 0; // nearest rounded mhz
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U32 mhz = 0; // calculated value.
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U32 mhz = 1000; // default if it can't be found
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LONG result;
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DWORD data = 0;
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@ -83,56 +151,35 @@ void Processor::init()
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result = ::RegQueryValueExA (hKey, "~MHz",NULL, NULL,(LPBYTE)&data, &dataSize);
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if (result == ERROR_SUCCESS)
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nearmhz = mhz = data;
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mhz = data;
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::RegCloseKey(hKey);
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}
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Platform::SystemInfo.processor.mhz = mhz;
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if (mhz==0)
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{
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Con::printf(" %s, (Unknown) Mhz", Platform::SystemInfo.processor.name);
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// stick SOMETHING in so it isn't ZERO.
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Platform::SystemInfo.processor.mhz = 200; // seems a decent value.
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}
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else
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{
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if (nearmhz >= 1000)
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Con::printf(" %s, ~%.2f Ghz", Platform::SystemInfo.processor.name, ((float)nearmhz)/1000.0f);
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else
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Con::printf(" %s, ~%d Mhz", Platform::SystemInfo.processor.name, nearmhz);
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if (nearmhz != mhz)
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{
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if (mhz >= 1000)
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Con::printf(" (timed at roughly %.2f Ghz)", ((float)mhz)/1000.0f);
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else
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Con::printf(" (timed at roughly %d Mhz)", mhz);
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}
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}
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if( Platform::SystemInfo.processor.numAvailableCores > 0
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|| Platform::SystemInfo.processor.numPhysicalProcessors > 0
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|| Platform::SystemInfo.processor.isHyperThreaded )
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Platform::SystemInfo.processor.properties |= CPU_PROP_MP;
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if (Platform::SystemInfo.processor.properties & CPU_PROP_FPU)
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Con::printf( " FPU detected" );
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Con::printf("Processor Init:");
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Con::printf(" Processor: %s", Platform::SystemInfo.processor.name);
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if (Platform::SystemInfo.processor.properties & CPU_PROP_MMX)
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Con::printf( " MMX detected" );
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if (Platform::SystemInfo.processor.properties & CPU_PROP_3DNOW)
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Con::printf( " 3DNow detected" );
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Con::printf(" MMX detected" );
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if (Platform::SystemInfo.processor.properties & CPU_PROP_SSE)
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Con::printf( " SSE detected" );
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if( Platform::SystemInfo.processor.properties & CPU_PROP_SSE2 )
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Con::printf( " SSE2 detected" );
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if( Platform::SystemInfo.processor.isHyperThreaded )
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Con::printf( " HT detected" );
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if( Platform::SystemInfo.processor.properties & CPU_PROP_MP )
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Con::printf( " MP detected [%i cores, %i logical, %i physical]",
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Platform::SystemInfo.processor.numAvailableCores,
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Platform::SystemInfo.processor.numLogicalProcessors,
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Platform::SystemInfo.processor.numPhysicalProcessors );
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Con::printf(" SSE detected" );
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if (Platform::SystemInfo.processor.properties & CPU_PROP_SSE2)
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Con::printf(" SSE2 detected" );
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if (Platform::SystemInfo.processor.properties & CPU_PROP_SSE3)
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Con::printf(" SSE3 detected" );
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if (Platform::SystemInfo.processor.properties & CPU_PROP_SSE3ex)
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Con::printf(" SSE3ex detected ");
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if (Platform::SystemInfo.processor.properties & CPU_PROP_SSE4_1)
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Con::printf(" SSE4.1 detected" );
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if (Platform::SystemInfo.processor.properties & CPU_PROP_SSE4_2)
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Con::printf(" SSE4.2 detected" );
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if (Platform::SystemInfo.processor.properties & CPU_PROP_AVX)
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Con::printf(" AVX detected");
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if (Platform::SystemInfo.processor.properties & CPU_PROP_MP)
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Con::printf(" MultiCore CPU detected [%i cores, %i logical]", Platform::SystemInfo.processor.numPhysicalProcessors, Platform::SystemInfo.processor.numLogicalProcessors);
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Con::printf(" ");
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PlatformBlitInit();
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@ -29,8 +29,6 @@
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extern void mInstallLibrary_C();
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extern void mInstallLibrary_ASM();
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extern void mInstall_AMD_Math();
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extern void mInstall_Library_SSE();
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//--------------------------------------
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DefineEngineStringlyVariadicFunction( mathInit, void, 1, 10, "( ... )"
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@ -40,7 +38,6 @@ DefineEngineStringlyVariadicFunction( mathInit, void, 1, 10, "( ... )"
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" - 'C' Enable the C math routines. C routines are always enabled.\n\n"
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" - 'FPU' Enable floating point unit routines.\n\n"
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" - 'MMX' Enable MMX math routines.\n\n"
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" - '3DNOW' Enable 3dNow! math routines.\n\n"
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" - 'SSE' Enable SSE math routines.\n\n"
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"@ingroup Math")
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@ -72,10 +69,6 @@ DefineEngineStringlyVariadicFunction( mathInit, void, 1, 10, "( ... )"
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properties |= CPU_PROP_MMX;
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continue;
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}
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if (dStricmp(str, "3DNOW") == 0) {
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properties |= CPU_PROP_3DNOW;
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continue;
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}
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if (dStricmp(str, "SSE") == 0) {
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properties |= CPU_PROP_SSE;
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continue;
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@ -116,17 +109,11 @@ void Math::init(U32 properties)
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if (properties & CPU_PROP_MMX)
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{
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Con::printf(" Installing MMX extensions");
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if (properties & CPU_PROP_3DNOW)
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{
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Con::printf(" Installing 3DNow extensions");
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mInstall_AMD_Math();
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}
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}
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if (properties & CPU_PROP_SSE)
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{
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Con::printf(" Installing SSE extensions");
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mInstall_Library_SSE();
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}
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Con::printf(" ");
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@ -26,6 +26,7 @@
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#if defined( TORQUE_OS_WIN )
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#include "platform/platformCPUCount.h"
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#include "console/console.h"
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#include <windows.h>
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#include <intrin.h>
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#include <stdio.h>
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@ -52,12 +53,10 @@ namespace CPUInfo {
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return bitSetCount;
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}
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EConfig CPUCount( U32& TotAvailLogical, U32& TotAvailCore, U32& PhysicalNum )
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EConfig CPUCount( U32& TotAvailLogical, U32& TotAvailCore )
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{
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EConfig StatusFlag = CONFIG_UserConfigIssue;
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TotAvailLogical = 0;
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TotAvailCore = 0;
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PhysicalNum = 0;
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PSYSTEM_LOGICAL_PROCESSOR_INFORMATION buffer = NULL;
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DWORD returnLength = 0;
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@ -68,42 +67,37 @@ namespace CPUInfo {
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rc = GetLogicalProcessorInformation( buffer, &returnLength );
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// if we fail, assume single threaded
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if( FALSE == rc )
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{
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free( buffer );
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return StatusFlag;
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Con::errorf("Unable to determine CPU Count, assuming 1 core");
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TotAvailCore = 1;
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TotAvailLogical = 1;
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return CONFIG_SingleCoreAndHTNotCapable;
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}
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#pragma push
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#pragma warning (disable: 6011)
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PSYSTEM_LOGICAL_PROCESSOR_INFORMATION ptr = buffer;
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DWORD byteOffset = 0;
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while( byteOffset + sizeof( SYSTEM_LOGICAL_PROCESSOR_INFORMATION ) <= returnLength )
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{
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switch( ptr->Relationship )
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{
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case RelationProcessorCore:
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if (ptr->Relationship == RelationProcessorCore)
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{
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TotAvailCore++;
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// A hyperthreaded core supplies more than one logical processor.
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TotAvailLogical += CountSetBits( ptr->ProcessorMask );
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break;
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case RelationProcessorPackage:
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// Logical processors share a physical package.
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PhysicalNum++;
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break;
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default:
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break;
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TotAvailLogical += CountSetBits(ptr->ProcessorMask);
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}
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byteOffset += sizeof( SYSTEM_LOGICAL_PROCESSOR_INFORMATION );
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ptr++;
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}
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}
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free( buffer );
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#pragma pop
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StatusFlag = CONFIG_SingleCoreAndHTNotCapable;
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EConfig StatusFlag = CONFIG_SingleCoreAndHTNotCapable;
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if( TotAvailCore == 1 && TotAvailLogical > TotAvailCore )
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StatusFlag = CONFIG_SingleCoreHTEnabled;
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