diff --git a/src/main/scala/net/psforever/actors/net/MiddlewareActor.scala b/src/main/scala/net/psforever/actors/net/MiddlewareActor.scala
index 5f56491d3..a465b9432 100644
--- a/src/main/scala/net/psforever/actors/net/MiddlewareActor.scala
+++ b/src/main/scala/net/psforever/actors/net/MiddlewareActor.scala
@@ -938,7 +938,7 @@ class MiddlewareActor(
   private def inSubslotNotMissing(slot: Int, subslot: Int, inner: ByteVector): Unit = {
     if (subslot == inSubslot + 1) {
       in(PacketCoding.decodePacket(inner))
-      send(RelatedB(slot, subslot))
+      send(RelatedB(slot % 4, subslot))
       inSubslot = subslot
     } else if (subslot > inSubslot + 1) {
       in(PacketCoding.decodePacket(inner))
@@ -1011,7 +1011,7 @@ class MiddlewareActor(
     if (inSubslotsMissing.isEmpty) {
       subslotMissingProcessor.cancel()
       activeSubslotsFunc = inSubslotNotMissing
-      send(RelatedB(slot, inSubslot)) //send a confirmation packet after all requested packets are handled
+      send(RelatedB(slot % 4, inSubslot)) //send a confirmation packet after all requested packets are handled
       log.trace("normalcy with packet subslot order; resuming normal workflow")
     }
   }