From 99665932d146417f7a64d4246fc8d65acdd3b31b Mon Sep 17 00:00:00 2001 From: Fate-JH Date: Tue, 30 Dec 2025 15:16:15 -0500 Subject: [PATCH] force RelatedB packets into a slot defined between 0-3 exclusively --- src/main/scala/net/psforever/actors/net/MiddlewareActor.scala | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/main/scala/net/psforever/actors/net/MiddlewareActor.scala b/src/main/scala/net/psforever/actors/net/MiddlewareActor.scala index 1fd3fa0c6..94f2dbdd7 100644 --- a/src/main/scala/net/psforever/actors/net/MiddlewareActor.scala +++ b/src/main/scala/net/psforever/actors/net/MiddlewareActor.scala @@ -932,7 +932,7 @@ class MiddlewareActor( private def inSubslotNotMissing(slot: Int, subslot: Int, inner: ByteVector): Unit = { if (subslot == inSubslot + 1) { in(PacketCoding.decodePacket(inner)) - send(RelatedB(slot, subslot)) + send(RelatedB(slot % 4, subslot)) inSubslot = subslot } else if (subslot > inSubslot + 1) { in(PacketCoding.decodePacket(inner)) @@ -1005,7 +1005,7 @@ class MiddlewareActor( if (inSubslotsMissing.isEmpty) { subslotMissingProcessor.cancel() activeSubslotsFunc = inSubslotNotMissing - send(RelatedB(slot, inSubslot)) //send a confirmation packet after all requested packets are handled + send(RelatedB(slot % 4, inSubslot)) //send a confirmation packet after all requested packets are handled log.trace("normalcy with packet subslot order; resuming normal workflow") } }